Knowing how much power an integrated circuit consumes or dissipates is important information to a designer. Knowing power dissipation of an integrated circuit facilitates doing power budgeting tasks, such as package selection, power supply selection, fan or intercooler selection, and the like. Moreover, as some devices, such as computers, have power consumption and heat dissipation limitations, knowing power dissipation of an integrated circuit is important to system design.
Conventionally, programmable logic device (PLD) (e.g., field-programmable gate array (FPGA), complex programmable logic device (CPLD), and the like) and application specific integrated circuit (ASIC) suppliers provide power estimators. For example, heretofore, Xilinx, Inc. of San Jose, Calif., provided a power estimator with their CPLDs. These power estimators necessitate a user having to provide an activity factor for each node under consideration. These activity factors are loaded into a spreadsheet for calculating power dissipation. Accordingly, it should be appreciated that many integrated circuits have millions of such nodes, and identifying each node and supplying an associated activity factor would be cumbersome and conventionally is not done.
For example, conventionally ASICS are supplied with power dissipation estimation equations with an activity factor estimate for switching of nodes internal to such ASICs. An activity factor estimate may be approximately ten percent (10%) of system clock frequency. Hence, if actual activity of such a node is twenty percent (20%) of system clock frequency, an error of one hundred percent (100%) occurs with respect to the frequency component of the following power dissipation equation for the dynamic power portion, PD,PD=f*(VDD)2*CL  (1)
where f is an activity factor or switching frequency, VDD is source voltage, and CL is capacitive load. As is well known, power dissipated equals the sum of static power dissipated plus dynamic power dissipated.
Furthermore, because integrated circuits have so many elements and these elements are formed using submicron technologies, it is problematic to probe each node under operation to determine respective switching frequencies. Moreover, such probing would need to be accomplished without affecting operation. Therefore, users may not have an accurate switching frequency to plug into such a spreadsheet for calculating power dissipation for like follow-on designs.
Computers are used both to design circuits and to simulate circuit behavior. Special languages and simulators, such as Verilog and VHSIC Hardware Description Language (VHDL), are used to describe and simulate circuits, including both elements and signals. Using such logic simulation languages, code may be written to simulate stimulus to a device. For example, an integrated circuit may be designed on a computer, and a “testbench”, namely code written to provide stimulus to a device under test, may be employed to simulate application of signals to such a simulated integrated circuit. A “testbench” comprises signal generating code for application to a simulated integrated circuit.
Accordingly, it would be desirable to use a computer simulation to determine switching frequencies at one or more nodes of a circuit to provide a more accurate method for determining power dissipation. Moreover, such simulated results could be compared against probing of an actual device for comparison.